Hardware & Embedded Engineering
Hardware / Firmware / FPGA engineer.
I build the parts where physics meets code.
I take projects from blank schematic to tested prototype — analog and digital circuit design, bare-metal embedded C, custom RTL on FPGA, and the mechanical enclosure that holds it all together. Where a project calls for it, I collaborate with a network of trusted specialists — firmware, RF, power electronics, and software — to keep delivery timelines realistic. Based in Poland, working internationally.
Selected work
2023
Safety-critical drive for a heat-pump valve that must open or close in under one millisecond. STM32F4 with PWM generation locked to ADC sampling cycle. Custom binary UART protocol with virtual-register access and remote function calls. Paired with a 300 V PFC pre-stage designed for future safety certification — worst-case, lifetime, and measurement-error analyses complete.
2022–2024
Lattice ECP3 design using the open-source yosys / nextpnr toolchain. RISC-V softcore integrated with custom RTL generating interdependent, runtime-configurable PWM channels. Achieved full timing closure; design in commercial production.
2021–2022
Full vector-control implementation from first principles — numerical motor model first, then hardware. PCB with onboard SMPS, current sensing synchronised to PWM, RS485 / CAN / UART. Bare-metal STM32 with hard real-time requirements.
2022
Schematic, PCB layout, gate-drive design, thermal analysis and prototype testing for a thyristor bridge driver. Worst-case simulation across full component tolerance spread and temperature range.
2022–2023
R&D team member (wykonawca prac B+R) in a BRIdge Alfa-funded research project developing an innovative fast energy transfer system (source → receiver) using supercapacitor-based hybrid storage, targeting portable medical devices (USG, ECG holters, defibrillators, ventilators). Responsible for component selection, power electronics design, and defining operating ranges matched to medical device load characteristics. Target: 10× faster charging at ≥75% efficiency with up to 1 000 000 charge cycles.
2018
Swimming algorithm design for Swimmo, a smartwatch for swim-spa (counter-current pool) users. Developed stroke recognition for four styles (crawl, breaststroke, backstroke, butterfly) and a calibration-based distance model from LSM9DS0 IMU quaternion data, compensating for variable current speed. Target: ≥90% correct per-user stroke classification. Implemented for the STM32L151CCU6 MCU.
2025
End-to-end delivery of a Renewable Energy Sources teaching laboratory: custom measurement PCBs for solar thermal collectors (Hewalex controller integration with reverse-engineered communication protocol), rooftop PV panels, two wind turbine stations, programmable electronic loads, weather station (anemometer, pyranometer, Modbus → MQTT), IP cameras (ONVIF / PoE), and a unified SCADA/HMI dashboard in Node-RED integrating all sources. Students control and monitor real hardware in real time.
2022
Mechanics and electronics for an autonomous kinetic installation by prof. artist Tomasz Opania (ASP Wrocław). A motorised object continuously splits into four vertical parts and reassembles — driven by a custom PCB with stepper motor control firmware. Designed and built from scratch: CNC-machined and laser-cut structural parts, all electronics. Exhibited at gallery Mieszkanie Gepperta, Wrocław, 2022.
2014–2016
Led Team Continuum — the Mars rover construction team at the University of Wrocław — through three international competition seasons (2014–2016). Designed the full mechanical system in Solid Edge: chassis, 6-DOF robotic manipulator, wheel assemblies and drive train, all CNC-machined and assembled in-house. Served as electronics and embedded systems architect for a ~10-person team (STM32 / AVR, ROS on Linux, radio comms, computer vision). Results: 6th ERC 2015, 3rd URC 2016 (Utah, USA), 4th ERC 2016 — the same hardware achieved 2nd at URC 2017 under the next team generation.
What I take on
Analog circuits, digital logic, power electronics and motor drivers, SMPS, measurement equipment. Component selection, worst-case analysis, thermal design, EMC review, prototype bring-up. KiCad, Altium Designer, Eagle.
Bare-metal C on STM32, AVR, Renesas, LPC. Low-level drivers, real-time control loops, custom communication protocols. Python tooling on the host side — test harnesses, data visualisation, protocol simulators.
Custom RTL on Lattice and Intel/Altera FPGAs, including the open-source yosys/nextpnr flow. RISC-V softcore integration, high-speed signal processing, timing closure and resource optimisation.
Numerical simulation of thermal, electromagnetic and mechanical phenomena fitted to MCU computation budgets. Motor control, power conversion, acoustic localisation — replacing costly prototype iterations with verified models.
3D CAD in SolidWorks / FreeCAD / Solid Edge. Own 3-axis CNC milling machine and 3D printers — from CAD to physical part quickly. Force, torque and material selection included.
Architecture review, feasibility analysis, design-for-manufacture checks, or a second pair of eyes on a hard debugging session. Useful for SW-heavy teams needing hardware depth, or startups evaluating technical risk.
Algorithm development for resource-constrained embedded targets — sensor fusion (IMU/AHRS, quaternions), real-time DSP kernels, motion recognition, and physical modelling fitted to MCU computation budgets. Covers LTE/5G baseband DSP, propulsion system simulation, and wearable gesture-recognition applications.
End-to-end integration of industrial hardware: Modbus, HART, CAN, RS485, LoRa, custom binary UART. Node-RED SCADA dashboards, MQTT brokering, ONVIF/PoE cameras, and custom PCBs bridging legacy field devices to modern Ethernet networks. Applied in renewable energy laboratories, industrial valve positioners, and process control systems.
Technical depth
| Languages | C (advanced), Python, C++, Assembly (ARM / AVR), Verilog / VHDL basics, MATLAB |
| MCU & FPGA | STM32 (Cortex-M0–M7), AVR, Renesas, LPC · Lattice ECP3, Intel/Altera · RISC-V softcore · yosys / nextpnr |
| EDA & PCB | KiCad, Altium Designer, Eagle 5.11 · LTspice, SPICE · multilayer, controlled-impedance, mixed-signal |
| Protocols | CAN, HART, Modbus, RS485, LoRa, SPI, I²C, UART, USB · TCP/IP stack · MQTT · ONVIF |
| Mechanical | SolidWorks, Solid Edge, FreeCAD + CAM · LinuxCNC (incl. RT-preempt kernel) · FDM / SLA 3D printing · manual milling |
| Simulation | Physical modelling & numerical methods (Python/MATLAB) · FEM basics · LTspice · thermal & lifetime calculations · Monte Carlo worst-case |
| Test & meas. | Oscilloscopes, logic analysers, VNA · EMC pre-compliance · climatic chamber · PyTest for C code |
| Dev workflow | Git (self-hosted Gitea) · Eclipse / AC6 (STM32) · Linux daily driver · Node-RED / SCADA · Jira, Confluence, Slack |
Background
July 2025 – present
CEO — Elekt sp. z o.o.
Świdnica, Poland
June 2019 – June 2025
Owner — Elekt (JDG)
Sole proprietorship · independent engineering · Świdnica
June 2021 – September 2022
Technical Leader — Nokia (via Sii)
LTE & 5G Layer 1 embedded software
August 2019 – May 2021
Senior Software Engineer — Sii sp. z o.o.
Nokia LTE/5G L1 embedded software (contract)
August 2017 – May 2019
Senior Software Engineer — GlobalLogic
Embedded software for industrial and IoT devices
Feb – June 2018
External Expert — NCBR
National Centre for Research and Development · Hyperloop feasibility
July 2016 – July 2017
Hardware Engineer — Diehl Controls
Appliance control hardware
2011 – 2020
MSc Engineering in Computer Science
University of Wrocław
Recognition
3rd place worldwide — University Rover Challenge 2016
Utah desert, USA. Team leader & main constructor. Same rover placed 2nd in 2017.
4th & 6th place — European Rover Challenge 2016 / 2015
Continuum team leader and primary mechanical & electronics designer.
1st place in Poland — IPJ & PAN “Fizyczne Ścieżki”
Winning project: electromagnetic coil gun. Physics modelling + electronics.
12th place in Poland — 60th Physics Olympiad
National-level competition. Physics intuition applied daily in engineering work.
SEP electrical certificate — up to 30 kV
Polish Association of Electrical Engineers qualification for high-voltage systems.
5th place in Poland — “Lwiątko” Polish–Ukrainian Physics Contest
Cross-border physics competition at national level.
Contact
I work on a contract or project basis — embedded systems, hardware design, FPGA, and related mechanical work. For larger scopes I bring in trusted specialist collaborators so the project stays on time and on spec. Open to both short engagements and longer collaborations.
